About
About
I am a PhD candidate at the State Key Laboratory of Processors, Institute of Computing Technology, Chinese Academy of Sciences and University of Chinese Academy of Sciences. I work with Prof. Huimin Cui and Assoc. Prof. Jiacheng Zhao on bridging compiler technologies with large language models to build reliable AI-driven systems. I have broader interests in end-to-end system support for LLM workloads, from compiler toolchains to runtime orchestration. I previously earned B.E. in Computer Science from the University of Chinese Academy of Sciences.
- Current position: PhD candidate, ICT CAS (Sep 2021 – present)
- Advisors: Prof. Huimin Cui, Assoc. Prof. Jiacheng Zhao
- Email: zhangshuoming17@mails.ucas.ac.cn
Research Interests
- LLM infrastructure and serving systems
- Compiler optimization for AI accelerators
- LLM-based program synthesis and debugging
- Reliability and safety for LLM-driven systems
Education
- Ph.D. in Computer Architecture, ICT CAS & UCAS, 2021 – 2026 (expected)
- B.Eng. in Computer Science, University of Chinese Academy of Sciences, 2017 – 2021
Research Projects
Current
- LLM-guided compilation workflows — Designing model-in-the-loop compilation pipelines that adapt source-to-assembly translation and error recovery with LLM feedback.
- LLM-aware compiler construction — Building reusable compiler components that leverage LLM reasoning for IR transformation, code generation, and verification.
- Secure and robust LLM decoding — Studying constrained decoding strategies to mitigate LLM safety vulnerabilities while preserving task performance.
Previous
- Heterogeneous model offloading with TVM (Intel collaboration) — Explored NPU/CPU co-execution and scheduling strategies within the TVM stack, prototyped a new TVM backend for simulator-based NPU.
- VLIW instruction scheduling (Huawei collaboration) — Developed instruction scheduling heuristics targeting domain-specific VLIW architectures.